1. Technical Field
The present invention is directed to built-in self-tests (BISTs). More specifically, the present invention is directed to a system, apparatus and method of improving logical built-in self test (LBIST) AC fault isolations.
2. Description of Related Art
LBIST technology has been used for decades to detect and isolate faults in integrated chips. An LBIST circuitry (see FIG. 1(a)) generally consists of a pseudo-random pattern generator (PRPG) 102, a plurality of parallel scan chains of latches 106 of the circuitry under test and a multiple input signature register (MISR) 110. A scan chain is also known in the field as a STUMP which is short for Self-Test Using MISR and Parallel shift register sequence generator. Scan chain and STUMP will be used interchangeably throughout the remainder of the disclosure.
The PRPG 102 generates a pseudo-random pattern of data (i.e., test data) that is fed into the parallel STUMPS 106 at each scan clock cycle. Further, at each scan clock cycle, test data in a preceding latch is shifted down to a succeeding latch in each one of the scan chains 106. This procedure continues until all the latches in the circuit are loaded with test data. Thus, the number of scan clock cycles is equal to at least the number of latches in the longest scan chain in the circuit. This part of the LBIST is generally referred to as the scan-shift phase. Once all the latches are loaded with test data, one or more (usually as many as desired) functional clocks are applied to the circuit.
As is well known, the latches are used to hold data that comes from combinational logic elements and/or is to be used as input to the combinational logic elements in the circuit. For example, at the application of a first functional clock of an LBIST, test data from a latch may be used as input to a combinational logic element and at the next functional clock, the latch may be used to hold data from a combinational logic element (e.g., the result of a test). Thus, the functional clocks are used to provide test data to the combinational logic elements in the circuit and to capture data from the combinational logic elements in the circuit into the latches of the STUMPS 106. This part of the LBIST is referred to as the data capture phase.
A scan-shift phase and a data capture phase make up an LBIST cycle. During the scan-shift phase of each succeeding LBIST cycle, the result of the test from the preceding LBIST cycle is scanned out of the STUMPS 106 and inputted into the MISR 110.
The LBIST circuitry may be used for DC and/or AC fault detection and isolation. DC fault detection entails determining whether the circuit being tested has at least a DC stuck-at or “broken” chain while AC fault detection includes determining whether the circuit has an AC defect. A circuit that has an AC defect contains at least one cone of influence. A cone is a combinational logic in a circuit that resolves into a single point. A cone of influence is a cone that does not exhibit errors at one clock rate (e.g., a slower clock rate) but does exhibit errors at another clock rate (e.g., a faster clock rate).
In DC fault detection, the MISR 110 compresses the data from the STUMPS 106 from one or several LBIST cycles into a unique signature of the logic circuit under test. A correct signature (i.e., the signature that should be obtained in the absence of a fault), which would have previously been obtained through analyses of the circuit under test may be compared with the unique signature to determine whether there is a DC fault. If the two signatures are the same, the circuit does not have a DC fault; otherwise, it does.
Provided that the circuit does not have a DC fault, it may further be tested for AC faults. In an AC fault detection test, the circuit is first evaluated under a relaxed time to obtain a reference signature. A relaxed time is a time that is long enough to allow all logic cones to fully evaluate. The reference signature is generally obtained under DC conditions. Once the reference signature is obtained, the test is run multiple times, each time using a faster LBIST cycle (i.e., faster functional clock rates), until a signature from the MISR 110 differs from the reference signature. Once this occurs, the maximum frequency of the circuit may be obtained. The maximum frequency of the circuit is the fastest frequency (i.e., the highest functional clock rate during the data capture phase) immediately before the frequency at which the signature from the MISR 110 differs from the reference signature.
In addition to finding the maximum frequency of the circuit, cones of influence or limiting cones may be determined. Determining a limiting cone may be of importance if the circuit is to be improved as well as if timing evaluations using different models are to be cross-checked. To determine which one of the cones in the circuit is a limiting cone, each STUMP 106 that contains a limiting cone has to be first isolated. To do so, mask controller 112 is used.
The mask controller 112 uses a plurality of OR gates 118 to mask all but one of the outputs of STUMPS 106. That is, the mask controller 112 outputs a logical one (1) or high bit to all but one of the OR gates 118. Then, the LBIST cycle for which the signature for the AC evaluation differs from the reference signature is determined for that unmasked STUMP 106 by running the AC fault detection test once more. If no signature change is registered then the unmasked STUMP 106 does not contain a limiting cone. If, on the other hand, a signature change is registered the unmasked STUMP 106 does contain a limiting cone.
Each STUMP 106 will sequentially be unmasked while all the others are masked. The AC fault detection test will be performed for each STUMP 106 unmasked. All unmasked STUMPS 106 for which a signature change is registered may be tagged as having at least one limiting cone.
To isolate a limiting cone in a STUMP 106, a dump of the latches in a STUMP 106 that is tagged as having a limiting cone may be performed under DC conditions as well as under AC conditions. The two dumps must be performed at the same LBIST cycle, the cycle at which the signature difference is registered, and compared to each other. The comparison will generally reveal the failing latch; and thus, the limiting cone.
This procedure, however, only allows one limiting cone to be isolated in any particular STUMP. Clearly, one STUMP may contain more than one limiting cone.
Thus, what is needed is a system, apparatus and method of improving AC fault isolations such that more than one limiting cone may be isolated in a STUMP.